ICT114 Computer Architecture Tutor-Marked Assignment Question | SUSS

Question 1 

A digital system uses 8-bit for integer representation and 16-bit for floating point number representation, and has an 8-bit wide memory. Data A and B are stored in memory as 1100 00

11₂ and 0110 1101₂  respectively.

Explain and analyse the various number representations and answer the following questions.

(a) (i) Express data A in hexadecimal. (1 mark)

(ii)Express data A in decimal if it is interpreted as an 8-bit sign-magnitude integer. Show your working.(2 marks)

(iii)Express data A in decimal if it is interpreted as an 8-bit 2’s complement integer. Show your working. (2 marks)

(b)If data B is ASCII-coded, and the most significant bit is used as a parity bit. Determine the ASCII character and the type of parity used. Show your working. (2 marks)

(c) If data A and B are interpreted as 8-bit sign-magnitude integer, show the result of the arithmetic operation A – B. Briefly explain whether the result can be saved in another 8-bit memory location. Show your working. (3 marks)

(d)If data A and B are interpreted as 8-bit 2’s complement integer, show how a computer system computes the arithmetic operation – A – B in 2’s complement. Convert -A, -B and the result (-A – B) to decimal to prove that the result of your 2’s complement.computation is indeed correct. Show your working. (8 marks)

(e) This microprocessor uses the specifications shown in Figure Q1(e) for 16-bit floating point number representation. If the decimal value is 1875, determine the 16-bit floating point representation. The mantissa is normalised.

A normalised mantissa has a logic ‘1’ after its binary point. E.g., 

Normalised mantissa: 0.1xxxxxxx

Non-normalised mantissa: 0.01xxxxxx

Non-normalised mantissa: 0.001xxxxx

Figure Q1(e)

(7 marks)

Question 2  

(a) Array and linked list are two common data structures used in software development. Illustrate with the aid of a diagram, explain how data is represented, structured and stored in main memory for each data structure.

(14 marks)

(b) Explain the process of instruction pipelining.

(3 marks)

(c) Give and explain FOUR (4) other methods of speeding up processors.

(8 marks)             

Question 3 

This question is based on the EASY68K simulated processor. Assume the contents of all data and address registers are equal to zero before the start of the program. All numbers are in hexadecimal.

Demonstrate how instructions of a program are executed by using the E114 Processor Instruction Set of the EASY68K simulator.

Figure Q3 is an incomplete program for the course’s simulated processor.

Figure Q3

The program is supposed to do the following:

1. Add up the first 6 data items ($1 to $6) stored at address label DATA.
2. Store the sum of the first 6 data items to address label SUM1.
3. Multiply the sum stored at address label SUM1 by 8, and store the result at address label MUL8.
4. Add up the last 6 data items ($7 to $C) stored at address label DATA.
5. Store the sum of the last 6 data items to address label SUM2.
6. Divide the sum stored at address label SUM2 by 4, and store the result at address label DIV4.

(a) Write a program to accomplish the above tasks and test its functionality with the course’s simulator. You are required to use a subroutine to add the values of the data items. The subroutine should follow directly after the main program. Once it is working correctly, copy the codes and paste your program to your MS WORD answer document. Your submission should be similar to the format given in Figure Q3. Do not submit a screenshot of the the program.

Note: You may need to use the logical shift instruction to write the program. 

(17 marks)

(b) Submit a screenshot of the memory contents that include addresses from 2FF0 to 3010 when the program stops. Use the instructions given below to obtain the screenshot.

Instructions:

1. To view the memory contents at the simulator screen, click on the View menu and select Memory. Click on the Page down button to the required addresses. Verify that the memory contents are indeed correct.
2. To capture the ‘screen shot’, select the window, press <Alt> + <Print Screen> on your computer keyboard, and then paste it onto your word document. Your submission should be similar to the sample given in Figure Q3(b).

Figure Q3(b)

(4 marks)

(c) Identify the addressing modes for the following instructions used by E114 simulator.

• L $200, D3
• W #$D, D2
• B (A1)+, D1
• AND D4, D2

(4 marks)     

Question 4  

A computer system has a 20-bit address bus and can address an 8-bit wide memory. The memory of this computer system contains 64 Kbytes of ROM and 256 Kbytes of RAM. The ROM and RAM form a contiguous block of memory starting at address 0. Explain how data is represented, structured and stored by answering the following questions.

(a) Determine the maximum number of addressable memory locations of this computer system. Express your answer in powers of 2. (2marks)

(b) Draw a memory map for the computer system. Indicate the starting and ending addresses in hexadecimal for each block of memory and any unused space. Show your working. (11 marks)

(c) Compare and contrast the differences among EPROM, EEPROM and flash memory. (9 marks)

(d) Describe the differnces between SDRAM and ordinary DRAM. (3 marks)

—- END OF ASSIGNMENT —-

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